36 #include "broadview.h"
52 uint64_t umShareBufferCount;
53 uint64_t umHeadroomBufferCount;
54 } data[BVIEW_ASIC_MAX_PORTS][BVIEW_ASIC_MAX_PRIORITY_GROUPS];
64 uint64_t umShareBufferCount;
65 } data[BVIEW_ASIC_MAX_PORTS][BVIEW_ASIC_MAX_INGRESS_SERVICE_POOLS];
75 uint64_t umShareBufferCount;
76 } data[BVIEW_ASIC_MAX_INGRESS_SERVICE_POOLS];
86 uint64_t ucShareBufferCount;
87 uint64_t umShareBufferCount;
88 uint64_t mcShareBufferCount;
89 uint64_t mcShareQueueEntries;
90 } data[BVIEW_ASIC_MAX_PORTS][BVIEW_ASIC_MAX_SERVICE_POOLS];
100 uint64_t umShareBufferCount;
101 uint64_t mcShareBufferCount;
102 uint64_t mcShareQueueEntries;
103 } data[BVIEW_ASIC_MAX_SERVICE_POOLS];
113 uint64_t ucBufferCount;
115 } data[BVIEW_ASIC_MAX_UC_QUEUES];
125 uint64_t ucBufferCount;
126 } data[BVIEW_ASIC_MAX_UC_QUEUE_GROUPS];
136 uint64_t mcBufferCount;
137 uint64_t mcQueueEntries;
139 } data[BVIEW_ASIC_MAX_MC_QUEUES];
149 uint64_t cpuBufferCount;
150 uint64_t cpuQueueEntries;
151 } data[BVIEW_ASIC_MAX_CPU_QUEUES];
161 uint64_t rqeBufferCount;
162 uint64_t rqeQueueEntries;
163 } data[BVIEW_ASIC_MAX_RQE_QUEUES];
191 typedef enum _bst_collection_mode_
193 BVIEW_BST_MODE_CURRENT = 1,
195 } BVIEW_BST_COLLECTION_MODE;
201 bool enableStatsMonitoring;
204 bool enableDeviceStatsMonitoring;
205 bool enableIngressStatsMonitoring;
206 bool enableEgressStatsMonitoring;
209 BVIEW_BST_COLLECTION_MODE mode;
211 bool enablePeriodicCollection;
212 int collectionPeriod;
216 typedef enum _bst_trigger_type_
218 BVIEW_BST_TRIGGER_DEVICE = (0x1 << 0),
219 BVIEW_BST_TRIGGER_INGRESS = (0x1 << 1),
220 BVIEW_BST_TRIGGER_EGRESS = (0x1 << 2)
222 } BVIEW_BST_TRIGGER_TYPE;
224 #define BVIEW_MAX_STRING_NAME_LEN 256
228 char realm[BVIEW_MAX_STRING_NAME_LEN];
229 char counter[BVIEW_MAX_STRING_NAME_LEN];
238 uint64_t ucShareThreshold;
239 uint64_t umShareThreshold;
240 uint64_t mcShareThreshold;
241 uint64_t mcShareQueueEntriesThreshold;
253 uint64_t umShareThreshold;
254 uint64_t umHeadroomThreshold;
260 uint64_t umShareThreshold;
266 uint64_t umShareThreshold;
272 uint64_t umShareThreshold;
273 uint64_t mcShareThreshold;
279 uint64_t ucBufferThreshold;
285 uint64_t ucBufferThreshold;
291 uint64_t mcBufferThreshold;
292 uint64_t mcQueueThreshold;
298 uint64_t cpuBufferThreshold;
299 uint64_t cpuQueueThreshold;
305 uint64_t rqeBufferThreshold;
306 uint64_t rqeQueueThreshold;
310 typedef BVIEW_STATUS(*BVIEW_BST_TRIGGER_CALLBACK_t) (
int asic,
320 #define BVIEW_BST_E_CPU_THRESHOLD_CHECK(_p) ((_p)->cpuBufferThreshold <= 0 || \
321 (_p)->cpuBufferThreshold > (BVIEW_BST_E_CPU_UCMC_THRES_DEFAULT))
324 #define BVIEW_BST_E_CPU_QUEUE_THRESHOLD_CHECK(_p) ((_p)->cpuQueueThreshold <= 0 || \
325 (_p)->cpuQueueThreshold > (BVIEW_BST_E_CPU_UCMC_THRES_DEFAULT))
328 #define BVIEW_BST_E_MC_THRESHOLD_CHECK(_p) ((_p)->mcBufferThreshold <= 0 || \
329 (_p)->mcBufferThreshold > BVIEW_BST_MCAST_THRES_DEFAULT)
332 #define BVIEW_BST_E_MC_QUEUE_THRESHOLD_CHECK(_p) ((_p)->mcQueueThreshold <= 0 || \
333 (_p)->mcQueueThreshold > (0x1FFFF * 208))
336 #define BVIEW_BST_E_UC_GRP_THRESHOLD_CHECK(_p) ((_p)->ucBufferThreshold <= 0 || \
337 (_p)->ucBufferThreshold > BVIEW_BST_UCAST_QUEUE_GROUP_DEFAULT)
340 #define BVIEW_BST_E_UC_THRESHOLD_CHECK(_p) ((_p)->ucBufferThreshold <= 0 || \
341 (_p)->ucBufferThreshold > BVIEW_BST_UCAST_THRES_DEFAULT)
344 #define BVIEW_BST_EPSP_UC_THRESHOLD_CHECK(_p) ((_p)->ucShareThreshold <= 0 || \
345 (_p)->ucShareThreshold > BVIEW_BST_E_P_SP_UC_THRES_DEFAULT)
348 #define BVIEW_BST_EPSP_UM_THRESHOLD_CHECK(_p) ((_p)->umShareThreshold <= 0 || \
349 (_p)->umShareThreshold > BVIEW_BST_E_P_SP_UCMC_THRES_DEFAULT)
352 #define BVIEW_BST_EPSP_MC_THRESHOLD_CHECK(_p) ((_p)->mcShareThreshold <= 0 || \
353 (_p)->mcShareThreshold > (0x1FFFF * 208))
356 #define BVIEW_BST_EPSP_MC_SQ_THRESHOLD_CHECK(_p) ((_p)->mcShareQueueEntriesThreshold <= 0 || \
357 (_p)->mcShareQueueEntriesThreshold > (0x1FFFF * 208))
360 #define BVIEW_BST_IPSP_THRESHOLD_CHECK(_p) ((_p)->umShareThreshold <= 0 || \
361 (_p)->umShareThreshold > BVIEW_BST_I_SP_UCMC_SHARED_THRES_DEFAULT)
364 #define BVIEW_BST_IPPG_SHRD_THRESHOLD_CHECK(_p) ((_p)->umShareThreshold <= 0 || \
365 (_p)->umShareThreshold > BVIEW_BST_I_P_SP_UCMC_SHARED_THRES_DEFAULT)
368 #define BVIEW_BST_IPPG_HDRM_THRESHOLD_CHECK(_p) ((_p)->umHeadroomThreshold <= 0 || \
369 (_p)->umHeadroomThreshold > BVIEW_BST_I_P_PG_UCMC_HDRM_THRES_DEFAULT)
373 #define BVIEW_BST_DEVICE_THRESHOLD_CHECK(_p) ((_p)->threshold <= 0 || \
374 (_p)->threshold > BVIEW_BST_DEVICE_THRES_DEFAULT)
377 #define BVIEW_BST_ISP_THRESHOLD_CHECK(_p) ((_p)->umShareThreshold <=0 || \
378 (_p)->umShareThreshold > (0x1FFFF * 208))
381 #define BVIEW_BST_E_SP_UM_THRESHOLD_CHECK(_p) ((_p)->umShareThreshold <= 0 || \
382 (_p)->umShareThreshold > BVIEW_BST_E_SP_UCMC_THRES_DEFAULT)
386 #define BVIEW_BST_E_SP_MC_THRESHOLD_CHECK(_p) ((_p)->mcShareThreshold <= 0 || \
387 (_p)->mcShareThreshold > BVIEW_BST_E_SP_MC_THRES_DEFAULT)
390 #define BVIEW_BST_E_SP_MC_SQ_THRESHOLD_CHECK(_p) ((_p)->mcShareQueueEntriesThreshold <= 0 || \
391 (_p)->mcShareQueueEntriesThreshold > (0x1FFFF * 208))
396 #define BVIEW_BST_E_RQE_THRESHOLD_CHECK(_p) ((_p)->rqeBufferThreshold <= 0 || \
397 (_p)->rqeBufferThreshold > BVIEW_BST_E_RQE_THRES_DEFAULT)
400 #define BVIEW_BST_E_RQE_QUEUE_THRESHOLD_CHECK(_p) ((_p)->rqeQueueThreshold <= 0 || \
401 (_p)->rqeQueueThreshold > (0xFFF * 208))
404 #define BVIEW_BST_E_MC_QG_THRESHOLD_CHECK(_p) ((_p)->mcThreshold <= 0 || \
405 (_p)->mcThreshold > (0x1FFFF * 208))
408 #define BVIEW_BST_E_MC_SQG_THRESHOLD_CHECK(_p) ((_p)->mcQueueEntriesThreshold <= 0 || \
409 (_p)->mcQueueEntriesThreshold > (0x1FFFF * 208))
413 #define BVIEW_BST_EGRESS_CPU_THRESHOLD_CHECK(_p) ((_p)->cpuThreshold <= 0 || \
414 (_p)->cpuThreshold > (0x1FFFF * 208))
418 #define BVIEW_BST_EGRESS_RQE_QUEUE_THRESHOLD_CHECK(_p) ((_p)->rqeThreshold <= 0 || \
419 (_p)->rqeThreshold > (0x1FFFF * 208))
423 #define BVIEW_BST_EGRESS_UC_THRESHOLD_CHECK(_p) ((_p)->ucThreshold <= 0 || \
424 (_p)->ucThreshold > (0x1FFFF * 208))
427 #define BVIEW_BST_EGRESS_UC_GRP_THRESHOLD_CHECK(_p) ((_p)->ucThreshold <= 0 || \
428 (_p)->ucThreshold > BVIEW_BST_UCAST_QUEUE_GROUP_DEFAULT)
430 typedef enum _threshold_fields_
437 MCSHARE_QUEUE_COUNTER,
443 }BVIEW_BST_COUNTER_t;
445 #define BVIEW_BST_REALM_MAX RQE_COUNTER
447 #define BVIEW_BST_PORT_POS (BVIEW_BST_REALM_MAX+1)
448 #define BVIEW_BST_SP_POS (BVIEW_BST_REALM_MAX+2)
449 #define BVIEW_BST_PG_POS (BVIEW_BST_REALM_MAX+3)
450 #define BVIEW_BST_QUEUE_POS (BVIEW_BST_REALM_MAX+4)
451 #define BVIEW_BST_QUEUE_GRP_POS (BVIEW_BST_REALM_MAX+5)
453 #define BVIEW_BST_DEVICE_MASK (1<<DEVICE_COUNTER)
454 #define BVIEW_BST_UMSHARE_MASK (1<<UMSHARE_COUNTER)
455 #define BVIEW_BST_UMHEADROOM_MASK (1<<UMHEADROOM_COUNTER)
456 #define BVIEW_BST_UCSHARE_MASK (1<<UCSHARE_COUNTER)
457 #define BVIEW_BST_MCSHARE_MASK (1<<MCSHARE_COUNTER)
458 #define BVIEW_BST_MCSHARE_QUEUE_MASK (1<<MCSHARE_QUEUE_COUNTER)
459 #define BVIEW_BST_UC_MASK (1<<UC_COUNTER)
460 #define BVIEW_BST_MCQUEUE_MASK (1<<MCQUEUE_COUNTER)
461 #define BVIEW_BST_MC_MASK (1<<MC_COUNTER)
462 #define BVIEW_BST_CPU_MASK (1<<CPU_COUNTER)
463 #define BVIEW_BST_RQE_MASK (1<<RQE_COUNTER)
465 #define BVIEW_BST_PORT_MASK (1<<BVIEW_BST_PORT_POS)
466 #define BVIEW_BST_SP_MASK (1<<BVIEW_BST_SP_POS)
467 #define BVIEW_BST_PG_MASK (1<<BVIEW_BST_PG_POS)
468 #define BVIEW_BST_QUEUE_MASK (1<<BVIEW_BST_QUEUE_POS)
469 #define BVIEW_BST_QUEUE_GRP_MASK (1<<BVIEW_BST_QUEUE_GRP_POS)
532 BVIEW_STATUS bst_cancel_request(
unsigned int unit,
unsigned int id);