OpenNSL API Guide and Reference Manual
port.h
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1 /*********************************************************************
2  *
3  * (C) Copyright Broadcom Corporation 2013-2017
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  ********************************************************************
18  * File: port.h
19  * Details: This file defines common network port parameters.
20  *
21  * Its contents are not used directly by applications;
22  * it is used only by header files of parent APIs
23  * which need to define port parameters.
24  * *******************************************************************/
25 
26 #ifndef _SHR_PORT_H
27 #define _SHR_PORT_H
28 
29 /*
30  * Typedef:
31  * _shr_port_t
32  * Purpose:
33  * Port number type for shared definitions
34  */
35 #include <sal/types.h>
36 
37 typedef int _shr_port_t;
38 
39 /*
40  * Defines:
41  * _SHR_PORT_DUPLEX_*
42  * Purpose:
43  * Defines duplexity of a port
44  */
45 
46 typedef enum _shr_port_duplex_e {
47  _SHR_PORT_DUPLEX_HALF,
48  _SHR_PORT_DUPLEX_FULL,
49  _SHR_PORT_DUPLEX_COUNT /* last, please */
50 } _shr_port_duplex_t;
51 /* __doxy_func_body_end__ */
52 
53 /*
54  * Defines:
55  * _SHR_PORT_IF_*
56  * Purpose:
57  * Defines interface type between MAC and PHY.
58  */
59 
60 typedef enum _shr_port_if_e {
61  _SHR_PORT_IF_NOCXN, /* No physical connection */
62  _SHR_PORT_IF_NULL, /* Pass-through connection without PHY */
63  _SHR_PORT_IF_MII,
64  _SHR_PORT_IF_GMII,
65  _SHR_PORT_IF_SGMII,
66  _SHR_PORT_IF_TBI,
67  _SHR_PORT_IF_XGMII,
68  _SHR_PORT_IF_RGMII,
69  _SHR_PORT_IF_RvMII,
70  _SHR_PORT_IF_SFI,
71  _SHR_PORT_IF_XFI,
72  _SHR_PORT_IF_KR,
73  _SHR_PORT_IF_KR4,
74  _SHR_PORT_IF_CR,
75  _SHR_PORT_IF_CR4,
76  _SHR_PORT_IF_XLAUI,
77  _SHR_PORT_IF_SR,
78  _SHR_PORT_IF_RXAUI,
79  _SHR_PORT_IF_XAUI,
80  _SHR_PORT_IF_SPAUI,
81  _SHR_PORT_IF_QSGMII,
82  _SHR_PORT_IF_ILKN,
83  _SHR_PORT_IF_RCY,
84  _SHR_PORT_IF_FAT_PIPE,
85  _SHR_PORT_IF_CGMII,
86  _SHR_PORT_IF_CAUI,
87  _SHR_PORT_IF_LR,
88  _SHR_PORT_IF_LR4,
89  _SHR_PORT_IF_SR4,
90  _SHR_PORT_IF_KX,
91  _SHR_PORT_IF_ZR,
92  _SHR_PORT_IF_SR10,
93  _SHR_PORT_IF_OTL,
94  _SHR_PORT_IF_CPU,
95  _SHR_PORT_IF_OLP,
96  _SHR_PORT_IF_OAMP,
97  _SHR_PORT_IF_ERP,
98  _SHR_PORT_IF_TM_INTERNAL_PKT,
99  _SHR_PORT_IF_SR2,
100  _SHR_PORT_IF_KR2,
101  _SHR_PORT_IF_CR2,
102  _SHR_PORT_IF_XFI2,
103  _SHR_PORT_IF_XLAUI2,
104  _SHR_PORT_IF_CR10,
105  _SHR_PORT_IF_KR10,
106  _SHR_PORT_IF_LR10,
107  _SHR_PORT_IF_ER,
108  _SHR_PORT_IF_ER2,
109  _SHR_PORT_IF_ER4,
110  _SHR_PORT_IF_CX,
111  _SHR_PORT_IF_CX2,
112  _SHR_PORT_IF_CX4,
113  _SHR_PORT_IF_CAUI_C2C,
114  _SHR_PORT_IF_CAUI_C2M,
115  _SHR_PORT_IF_VSR,
116  _SHR_PORT_IF_LR2,
117  _SHR_PORT_IF_LRM,
118  _SHR_PORT_IF_XLPPI,
119  _SHR_PORT_IF_2500X,
120  _SHR_PORT_IF_SAT,
121  _SHR_PORT_IF_IPSEC,
122  _SHR_PORT_IF_LBG,
123  _SHR_PORT_IF_CAUI4,
124  _SHR_PORT_IF_5000X,
125  _SHR_PORT_IF_EVENTOR,
126  _SHR_PORT_IF_RCY_MIRROR,
127  _SHR_PORT_IF_COUNT /* last, please */
128 } _shr_port_if_t;
129 /* __doxy_func_body_end__ */
130 
131 /*
132  * Defines:
133  * _SHR_PORT_STP_*
134  * Purpose:
135  * Defines the spanning tree states of a port.
136  */
137 
138 typedef enum _shr_port_stp_e {
139  _SHR_PORT_STP_DISABLE = 0,
140  _SHR_PORT_STP_BLOCK = 1,
141  _SHR_PORT_STP_LISTEN = 2,
142  _SHR_PORT_STP_LEARN = 3,
143  _SHR_PORT_STP_FORWARD = 4,
144  _SHR_PORT_STP_COUNT = 5 /* last, please */
145 } _shr_port_stp_t;
146 /* __doxy_func_body_end__ */
147 
148 /*
149  * Defines:
150  * _SHR_PORT_MDIX_*
151  * Purpose:
152  * Defines the MDI crossover (MDIX) modes for the port
153  */
154 typedef enum _shr_port_mdix_e {
155  _SHR_PORT_MDIX_AUTO,
156  _SHR_PORT_MDIX_FORCE_AUTO,
157  _SHR_PORT_MDIX_NORMAL,
158  _SHR_PORT_MDIX_XOVER,
159  _SHR_PORT_MDIX_COUNT /* last, please */
160 } _shr_port_mdix_t;
161 /* __doxy_func_body_end__ */
162 
163 /*
164  * Defines:
165  * _SHR_PORT_MDIX_STATUS_*
166  * Purpose:
167  * Defines the MDI crossover state
168  */
169 typedef enum _shr_port_mdix_status_e {
170  _SHR_PORT_MDIX_STATUS_NORMAL,
171  _SHR_PORT_MDIX_STATUS_XOVER,
172  _SHR_PORT_MDIX_STATUS_COUNT /* last, please */
173 } _shr_port_mdix_status_t;
174 /* __doxy_func_body_end__ */
175 
176 /*
177  * Defines:
178  * _SHR_PORT_MEDIUM_*
179  * Purpose:
180  * Supported physical mediums
181  */
182 typedef enum _shr_port_medium_e {
183  _SHR_PORT_MEDIUM_NONE = 0,
184  _SHR_PORT_MEDIUM_COPPER = 1,
185  _SHR_PORT_MEDIUM_FIBER = 2,
186  _SHR_PORT_MEDIUM_COUNT /* last, please */
187 } _shr_port_medium_t;
188 /* __doxy_func_body_end__ */
189 
190 /*
191  * Defines:
192  * _SHR_PORT_MCAST_FLOOD_*
193  * Purpose:
194  * Multicast packet flooding mode
195  */
196 typedef enum _shr_port_mcast_flood_e {
197  _SHR_PORT_MCAST_FLOOD_ALL = 0,
198  _SHR_PORT_MCAST_FLOOD_UNKNOWN = 1,
199  _SHR_PORT_MCAST_FLOOD_NONE = 2,
200  _SHR_PORT_MCAST_FLOOD_COUNT /* last, please */
201 } _shr_port_mcast_flood_t;
202 /* __doxy_func_body_end__ */
203 
204 /*
205  * Defines:
206  * _SHR_PORT_PHY_CONTROL_*
207  * Purpose:
208  * PHY specific control settings
209  */
210 typedef enum _shr_port_phy_control_e {
211  _SHR_PORT_PHY_CONTROL_FORWARD_ERROR_CORRECTION = 74,
212  _SHR_PORT_PHY_CONTROL_SOFTWARE_RX_LOS = 214,
213  _SHR_PORT_PHY_CONTROL_SOFTWARE_RX_LOS_LINK_WAIT_TIMER_US = 328,
214  _SHR_PORT_PHY_CONTROL_SOFTWARE_RX_LOS_RESTART_TIMER_US = 329
215 } _shr_port_phy_control_t;
216 /* __doxy_func_body_end__ */
217 
218 /*
219  * Defines:
220  * _SHR_PORT_PRBS_POLYNOMIAL_*
221  * Purpose:
222  * PRBS polynomial type
223  */
224 typedef enum _shr_port_prbs_polynomial_e {
225  _SHR_PORT_PRBS_POLYNOMIAL_X7_X6_1 = 0,
226  _SHR_PORT_PRBS_POLYNOMIAL_X15_X14_1 = 1,
227  _SHR_PORT_PRBS_POLYNOMIAL_X23_X18_1 = 2,
228  _SHR_PORT_PRBS_POLYNOMIAL_X31_X28_1 = 3,
229  _SHR_PORT_PRBS_POLYNOMIAL_X9_X5_1 = 4,
230  _SHR_PORT_PRBS_POLYNOMIAL_X11_X9_1 = 5,
231  _SHR_PORT_PRBS_POLYNOMIAL_X58_X31_1 = 6
232 } _shr_port_prbs_polynomial_t;
233 /* __doxy_func_body_end__ */
234 
235 /*
236  * Defines:
237  * _SHR_PORT_PHY_CONTROL_FEC_*
238  * Purpose:
239  * PHY specific values for _SHR_PORT_PHY_CONTROL_FORWARD_ERROR_CORRECTION
240  */
241 typedef enum _shr_port_phy_control_fec_e {
242  _SHR_PORT_PHY_CONTROL_FEC_OFF,
243  _SHR_PORT_PHY_CONTROL_FEC_ON,
244  _SHR_PORT_PHY_CONTROL_FEC_AUTO
245 } _shr_port_phy_control_fec_t;
246 /* __doxy_func_body_end__ */
247 
248 typedef enum _shr_port_phy_control_rx_los_e {
249  _SHR_PORT_PHY_CONTROL_RX_LOS_NONE,
250  _SHR_PORT_PHY_CONTROL_RX_LOS_SOFTWARE,
251  _SHR_PORT_PHY_CONTROL_RX_LOS_FIRMWARE
252 } _shr_port_phy_control_rx_los_t;
253 /* __doxy_func_body_end__ */
254 
255 #endif /* !_SHR_PORT_H */