OpenNSL provides a mechanism to customize the Switch initialization, by accepting a set of properties through a configuration file. The properties are mainly used to customize the platform without having to re-compile the OpenNSL.
It also provides a mechanism to customize the platform, by accepting a set of diagnostic commands through a file, that are applied after system initialization.
OpenNSL is enhanced to accept the platform configuration from a file. During initialization, OpenNSL checks for the presence of configuration file. If the file exists, the configuration from the file is applied. Note that OpenNSL does not validate the property values specified in the file. For properties with invalid values, the default value would be assumed. Run-time modifications to the configuration file do not take effect until OpenNSL is re-initialized.
End users can potentially use different configuration files based on the platform variant.
OpenNSL is enhanced to check for the presence of post initialization script file at the end of the system initialization. If the file exists, the commands from the file are applied. Note that OpenNSL continues execution of commands with appropriate logs for invalid commands.
End users can potentially use different post initialization script file based on the platform variant.
A property is a 'name=value' pair where name is a string and value is typically specified as a number. Each property has a default value that is compiled into the driver and takes effect if the property is not customized. The following properties are allowed.
| Property | Description
|
| arl_clean_timeout_usec | Timeout for hardware-accelerated ARL delete operations including: delete by port, delete by port+modid, delete by VLAN, delete by trunk.
|
| asf_mem_profile | BCM56960/BCM56970 : MMU Cell Buffer Allocation Profile to support ASF (cut-thru) Forwarding 0: No cut-through support 1: Similar speed profile (Default) 2: Extreme speed profile
|
| bcm_linkscan_interval | Linkscan interval in microseconds. If non-zero, bcm_init() will start linkscan
|
| bcm_num_cos=<val> | Initial number of CoS queues the driver configures the Switch for.
Example: To set the number of COS queues to 8, use "bcm_num_cos=8"
|
| bcm_stat_flags | Flag values to be ORd together: 0x0 indicates that counter DMA should NOT be used 0x1 indicates that counter DMA should be used (default).
|
| bcm_stat_interval=<val> | Set statistics collection interval in microseconds. Setting this to 0 will prevent counters from being started.
Example: bcm_stat_interval=2000000
|
| bcm_stat_jumbo | Threshold value for oversize (*OVR) frame size. Values over 1518 affect the *OVR statistics computation
|
| bcm_stat_pbmp | BCM Statistics Collection: Set bitmap of ports on which stat collection will be enabled. Default is all ports.
|
| bcm_stat_sync_timeout | Timeout delay in microseconds before bcm_stat_sync returns BCM_E_TIMEOUT
|
| bcm_tunnel_term_compatible_mode | Enable Tunnel Termination for protocol types, compatible for all devices. Setting the compatible mode ignores protocol match and sets protocol mask to zero.
|
| bcm_xlate_port_enable | Convenience variable that can be used to turn off both physical and system port mapping. This variable overrides the dedicated variables described above.
|
| bcm56340_2x10 | Enable 12xF.QSGMII + 2xFlex[4x10] + 1GE mode for BCM56340.
|
| bcm56340_4x10 | Enable 12xF.QSGMII + Flex[4x10] + 2xHG[21] + 1GE mode for BCM56340.
|
| bcm886xx_ether_ip_enable | Enable/disable etherIP (RFC 3378) support.
|
| bcm886xx_ip4_tunnel_termination_mode | See SDK documentation.
|
| bcm886xx_l2gre_enable | Enable/disable L2GRE support.
|
| bcm886xx_vxlan_enable | Enable/disable VXLAN support.
|
| bcm886xx_vxlan_tunnel_lookup_mode | See SDK documentation.
|
| cdma_timeout_usec=<val> | Counter DMA collection pass timeout in microseconds.
Example: cdma_timeout_usec=3000000
|
| core_clock_frequency | Core clock frequency applied to Switch chip. Any unsupported frequency will be ignored
|
| ctr_evict_enable | Enables to reduce the frequency of software polling of some counters that support eviction.
|
| dma_desc_timeout_usec | SBUSDMA descriptor mode operation timeout in microseconds
|
| dport_map_direct | Traditionally, specifying a raw number instead of a port name in the diag shell will be parsed as if port numbers are counted from 1 up to the number of enabled ports. Typically this would mean that for a gigabit Switch, port 1 would correspond to ge0, and so forth. Setting this flag causes raw port numbers to be parsed as internal port numbers.
|
| dport_map_enable | Enable diag shell port mapping. Port names will be assigned in dport order, and the BCM shell will list multiple ports in dport order regardless of the internal port numbering.
|
| dport_map_indexed | Port names for each port type (fe, ge, etc.) will increment by one starting at zero, e.g. if a Switch has four xe ports with dport numbers 24, 25, 26, and 27, they will be named xe0, xe1, xe2, and xe3. In non-indexed mode the ports would be named xe24, xe25, xe26, and xe27.
|
| dport_map_port | Map dport number <dport> to internal port number <port>. dport_map_port_<port>=<dport>
|
| dpp_clock_ratio | DPP clock ratio applied to Switch chip, any unsupported ratio will be ignored.
|
| fpem_mem_entries | Number of FPEM mem entries.
|
| help_cli_enable | Display the usage information for a CLI command when "help <cmd>" is used.
|
| higig2_hdr_mode | Uncomment the following line to make all HG ports default to HiGig2.
|
| host_as_route_disable=<val> | To enable/disable HOST AS ROUTE feature which allows the entry to be automatically added to the route table if the host table is either full or there is a hash collision by calling bcm_l3_host_add API with BCM_L3_HOST_AS_ROUTE flag.
Possible value for <val> are:
0 - Enable HOST AS ROUTE (default)
1 - Disable HOST AS ROUTE
Example: To disable Host As Route feature, use "host_as_route_disable=1"
|
| ipmc_do_vlan | Include the VLAN as part of the hash key for L3 IPMC
|
| ipv6_lpm_128b_enable=<val> | 1: Enable IPv6 128b prefix LPM routes.
0: Disable IPv6 128b prefix LPM routes.
Example: ipv6_lpm_128b_enable=1
|
| knet_filter_persist | Do not create default KNET Rx filter and preserve existing KNET filters during BCM API initialization and shutdown.
|
| l2_mem_entries=<val> | Specify number of widest L2 memory entries.
Example: To set number of L2 entries to 32768, use "l2_mem_entries=32768"
|
| l2delete_chunks | L2 table is DMAed into memory to search for entries to delete when no hardware assists are available. DMA is done in smaller parts to minimize memory use. Must be port of 2.
|
| l2mod_dma_intr_enable | Command memory controls.
|
| l2xmsg_hostbuf_size=<val> | Size of the buffer that is used to drain L2 FIFO when working in the L2 FIFO mode.
Example: l2xmsg_hostbuf_size=16384
|
| l2xmsg_mode=<val> | Mode control to select L2 Table DMA mode for L2 table change notifications. 0 - Polled, 1 - FIFO mode.
Example: l2xmsg_mode=1
|
| l3_alpm_enable=<val> | Enable ALPM for L3 Prefix routes. Set to 1 for parallel search mode, 2 for combined search mode. 3 for TCAM/ALPM mode.
Example: l3_alpm_enable=2
|
| l3_intf_vlan_split_egress=<val> | Specifies egress objects can have different egress properties.
Possible value for <val> are:
0 - opennsl_l3_intf_t objects with the same l3a_vid can NOT have different egress properties(e.g. l3a_mtu, l3a_mac_addr). However, Stict Mode URPF and ICMP redirected to cpu are guaranteed to work.
1 - opennsl_l3_intf_t objects with the same l3a_vid can have different (split) egress personalities, e.g. l3a_mtu, l3a_mac_addr. However, Strict Mode URPF and ICMP redirected to cpu are not guaranteed to work.
Example: l3_intf_vlan_split_egress=0x1
|
| l3_max_ecmp_mode | Control the scalability of ECMP groups
|
| l3_mem_entries=<val> | Specify number of widest L3 memory entries.
Example: To set number of L3 entries to 16384, use "l3_mem_entries=16384"
|
| lls_num_l2uc=<val> | The default number of unicast queues at L2 for Linked List Scheduler (LLS) setup.
Example: lls_num_l2uc=16
|
| load_firmware | this property is for debug and diagnostic purpose. byte0: 0: not loading WC firmware 1: load from MDIO. default method. 2: load from parallel bus if applicable. Provide fast downloading time
byte1: 0: inform uC not to perform checksum calculation(default). Save ~70ms for WC init time 1: inform uC to perform checksum calculation.
|
| lpm_ipv6_128b_reserved=<val> | Possible values for <val> are:
1: Number of entries specified by num_ipv6_lpm_128b_entries property are reserved exclusively for 128B V6 LPM entries.
0: Do not reserve any entries for 128B V6 entries and use the whole of paired TCAMs for either 128B V6, 64B V6, V4 entries. Ignored if lpm_scaling_enable is 0.
Example: lpm_ipv6_128b_reserved=1
|
| lpm_scaling_enable=<val> | Possible values for <val> are:
1: Allow adding 64B IPV6 LPM entries in unreserved paired TCAM.
0: Do not allow adding 64B IPV6 LPM entries in paired TCAM.
Example: lpm_scaling_enable=1
|
| max_vp_lags=<val> | The maximum number of virtual port trunk groups.
Example: max_vp_lags=0
|
| mdio_output_delay=<val> | Number of clock delay between the rising edge of MDC and the starting data of MDIO.
Example: mdio_output_delay=0xb
|
| mem_cache_enable | Enable/Disable Memory table cache.
|
| mem_check_max_override | Check for mem max override properties and reconfigure memories.
|
| mem_check_nocache_override | Check for mem no-cache override properties and avoid caching.
|
| mem_clear_chunk_size | The size in bytes of memory to be used when clearing a table using bulk table operations. The number of table entries cleared in one operation will vary by table entry width.
|
| mem_clear_hw_acceleration | Clear tables using the fastest method supported by the device.
|
| mem_nocache | Disable Memory table cache
|
| mem_scan_enable | Control to automatically run background memory scan to detect and correct memory errors in certain statis hardware memories (tables).
|
| memcmd_intr_enable | Command memory controls
|
| memlist_enable | When enabled, table information is displayed on issuing "listmem" CLI command.
|
| miim_intr_enable=<val> | This variable controls the interrupt mode for MII operations.
Possible value for <val> are:
1 - Use interrupts for MII operations
0 - Use polling mode for MII operations
Example: To use polling mode for MII operations, use "miim_intr_enable=0"
|
| miim_timeout_usec | MIIM operation timeout in microseconds
|
| mmu_lossless=<val> | To set the default MMU lossless behaviour.
Possible value for <val> are:
0 - For lossy application. Addressing fairness between queues.
1 - For lossless application. Addressing avoiding packet loss, pause generation.
Example: mmu_lossless=1
|
| module_64ports=<val> | Device that can support more than 32 ports per single modid will operate in configuration where all ports are mapped to the base modid.
Example: module_64ports=1
|
| multicast_l2_range | In BCM568xx and BCM567xx devices, some L2 and L3 multicast information is stored in a shared resource. This value describes the number of resource entries devoted to L2 multicast.
|
| multicast_l3_range | In BCM568xx and BCM567xx devices, some L2 and L3 multicast information is stored in a shared resource. This value describes the number of resource entries devoted to IP multicast.
|
| num_ipv6_lpm_128b_entries=<val> | Configure the number of 128b prefix LPM routes.
Example: num_ipv6_lpm_128b_entries=2000
|
| os=<val> | Set the flavor of OS in use to "unix" or "linux" Example: os=unix
|
| oversubscribe_mode | Config to describe the system Linerate or Oversubscribe mode. 0: Linerate only (default). 1: Oversubscribe mode (all ports will be oversub). 2: Mixed mode. Check device specification for applicability. Port bitmap specified via pbmp_oversubscribe.
|
| parity_correction | Control to disable parity correction
|
| parity_enable | Control to disable parity messages
|
| pbmp_gport_stack | Control GE ports as regular front panel Ethernet ports.
|
| pbmp_oversubscribe=<pbmp> | Port bitmap for ports in oversubscription mode.
Example: To set oversubsciption mode for all 72 XE ports on a platform, use "pbmp_oversubscribe=0x1fffffffffffffffffe"
|
| pbmp_xport_xe=<pbmp> | Select the XE ports by specifying the port bitmap.
Example: To have 72 XE ports on a platform, use "pbmp_xport_xe=0x1fffffffffffffffffe"
|
| pci2eb_override | Indication that RCPU unit is present on a device
|
| phy_5464S | Specifies the external PHY device is BCM5464S.
|
| phy_84328 | To use 84328 as the PHY identifier in the PHY device family.
|
| phy_84752 | This specifies the external PHY device is BCM84752.
|
| phy_an_allow_pll_change | This controls if pll change allowed during AN enable(1), disable(0).
|
| phy_an_c37_<port>=<val> | This controls the clause 37 auto-negotiation.
Use value of 0 to disable and 3 to use clause 37 auto negotiation.
Example: To set the C37 auto-negotiation on all xe ports, use "phy_an_c37_xe=3"
|
| phy_an_c73_<port>=<val> | This controls the clause 73 auto-negotiation.
Use value of 0 to disable clause 73 auto negotiation.
Example: To disable C73 auto-negotiation on all xe ports, use "phy_an_c73_xe=0"
|
| phy_an_fec | This controls the clause 74(FEC) enable(1), disable(0).
|
| phy_automedium | Fiber vs copper autodetection enable.
|
| phy_aux_voltage_enable | This controls whether to enable the auxiliary ouput voltage from the applicable PHY devices. enable(1), disable(0).
|
| phy_chain_rx_lane_map_physical | Remap Rx lanes to desired mapping on applicable PHY devices.
|
| phy_chain_rx_polarity_flip_physical | Flip PHY lane RX polarity on applicable PHY devices.
|
| phy_chain_tx_lane_map_physical | Remap Tx lanes to desired mapping on applicable PHY devices.
|
| phy_chain_tx_polarity_flip_physical | Flip PHY lane TX polarity on applicable PHY devices.
|
| phy_ext_an_fec | Advertise Clause 74 (or) Clause 91 Forward Error Correction (FEC) as part of Auto-Negotiation ability for external PHYs 0 - Do not advertise FEC as Auto-Negotiation ability. 1 - Advertise FEC as Auto-Negotiation ability.
|
| phy_ext_rom_boot | This controls whether to load the external ROM microcode to the applicable PHY devices, load(1), not load(0).
|
| phy_gearbox_enable | Setting this property to 1 enables the gearbox data path mode on select PHY devices.
|
| phy_led[0..3]_mode | LED selector values from phy registers.
|
| phy_led3_output_disable | Controls LED for LOS signal.
|
| phy_led_ctrl | Control the LED function on 546x phy device.
|
| phy_led_link_speed_mode | Indicate the link and speed status of the copper interfaces.
|
| phy_led_select | Select the multi-color LED display pattern on 546x phy device.
|
| phy_line_tx_mode | To enable transmission on line side of the interface.
|
| phy_pcs_rx_polarity_flip | Flip PCS lane RX polarity. See phy_xaui_tx_polarity_flip for values.
|
| phy_pcs_tx_polarity_flip | Flip PCS lane TX polarity. See phy_xaui_tx_polarity_flip for values.
|
| phy_port_primary_and_offset | Specifies the base port and phy index of a multi slice phy chip. phy_port_primary_and_offset_<port>=0xPPOO 0xPP=primary port number 0xOO=offset of the slice For example,for ports ge0-ge3 Primary Port number is 02 (base port) phy_port_primary_and_offset_ge0=0x0200 primary port number=0x02 offset=00 phy_port_primary_and_offset_ge1=0x0201 primary port number=0x02 offset=01 phy_port_primary_and_offset_ge2=0x0202 primary port number=0x02 offset=02 phy_port_primary_and_offset_ge3=0x0203 primary port number=0x02 offset=03
|
| phy_rx_polarity_flip | Flip PHY lane RX polarity on applicable ext PHY devices Detail see phy_tx_polarity_flip.
|
| phy_sgmii_autoneg | Enable SGMII autonegotiation between the serdes and PHY.
|
| phy_system_tx_mode | To enable transmission on system side of the interface.
|
| phy_tx_polarity_flip | Flip PHY lane TX polarity on applicable ext PHY devices Format: phy_tx_polarity_flip_logicalPort = VALUE VALUE: 1 - Flip TX polarity. 0 - Do not flip TX polarity. Each bit represents one lane. For Example: phy_tx_polarity_flip_ce0 = 0x5 Flip TX polarity on the first and third lane of ce0 on external phy The polarity info of one core needs to be given in a signle command.
|
| phy_xaui_rx_polarity_flip_<port>=<val> | Flip XAUI lane RX polarity. See phy_xaui_tx_polarity_flip for values.
Example: To set XAUI RX lane polarity settings for port 4 to a value of 0xe, use "phy_xaui_rx_polarity_flip_4=0xe"
|
| phy_xaui_tx_polarity_flip_<port>=<val> | Flip XAUI lane TX polarity on applicable serdes devices.
Possible values for <val> are:
1 - Flip TX polarity on all lane(s) of the port
0x000F - Flip TX polarity on lane 0.
0x00F0 - Flip TX polarity on lane 1.
0x0F00 - Flip TX polarity on lane 2.
0xF000 - Flip TX polarity on lane 3.
Example: To set XAUI TX lane polarity settings for port 3 to a value of 0xe, use "phy_xaui_tx_polarity_flip_3=0xe"
|
| port_flex_enable | Indicates that the port module(macro) on which this physical port resides is flex enable or not. This property is per port macro. For port macros consisting of multiple smaller port macros, enabling flex on that port macro also enables flex on the smaller port macros.
|
| port_init_adv | Default local advertisement settings for a port
|
| port_init_autoneg | Default auto negotiation state of the port
|
| port_init_cl72=<val> | Possible value for <val> are:
1 - To initialize the port with CL72 enabled.
0 - To initialize the port with CL72 diabled.
Example: port_init_cl72=0
|
| port_init_duplex | Default duplex mode the port will initialize with
|
| port_init_speed | Default speed that the port will initialize with
|
| port_max_speed | overwrite the default port max speed
|
| port_phy_addr | PHY address of a port. Used also to specify the MDIO address of non-switching interfaces, such as external tcams in the format port_phy_addr_ext_tcam#. Format: port_phy_addr_logicalPort = mdio_addr For example: port_phy_addr_ce0 = 0x10
|
| port_phy_clause | MDIO Bus Property to select the MDIO access mechanism (CLAUSE22 / CLAUSE45)
|
| port_phy_id0 | First part of a uniqe PHY identifier, if not specified in register
|
| port_phy_id1 | Second part of a uniqe PHY identifier, if not specified in register
|
| port_phy_precondition_before_probe | This controls whether to precondition this port before probing of PHY on this port for applicable PHY devices, precondition(1)/not(0).
|
| port_uc_mc_accounting_combine | Tells whether to use separate or combined port use-count, port limit and port resume for UC and MC
|
| portgroup | Specifies the number of lanes used by each port in the flex port group.
|
| portmap_<port>= <pnum>:<bandwidth> | Specify Port numbering and bandwidth assignment
port - Logical port number
pnum - Physical port number
bandwidth - Port bandwidth in Gb.
Example: To map logical port 1 to physical port 29 and set the bandwidth to 40Gig, use "portmap_1=29:40"
|
| ptp_bs_fref | PTP BroadSync/10Mhz PLL value for fref parameter
|
| ptp_ts_pll_fref | PTP Timestamping PLL value for fref parameter
|
| rate_ext_mdio_divisor=<val> | The frequency of the MDIO clock is a function of the core clock. This property is used to select external MDIO clock rate divisor.
Example: rate_ext_mdio_divisor=0x80
|
| reglist_enable | When enabled, register information is displayed on issuing "listreg" CLI command.
|
| robust_hash_disable_egress_vlan | Disable robust hashing for EGR_VLAN_XLATE table.
|
| robust_hash_disable_mpls | Disable robust hashing for MPLS_ENTRY table.
|
| robust_hash_disable_vlan | Disable robust hashing for VLAN_XLATE table.
|
| robust_hash_seed_egress_vlan | Set random seed to configure remapping structures for robust hash egress vlan translate table.
|
| robust_hash_seed_mpls | Set random seed to configure remapping structures for robust hash MPLS table.
|
| robust_hash_seed_vlan | Set random seed to configure remapping structures for robust hash vlan translate table.
|
| scache_filename=<filename> | Specify the file to which the warmboot cache data is written during warmboot operations. This is used to use the SDK system defaults for stable location and size, when stable_filename and stable_location are not specified explicitly.
Example: To use "/tmp/scache_file" for scache data, use "scache_filename=/tmp/scache_file"
|
| schan_intr_enable=<val> | This variable controls the interrupt mode for Address Resolution Logic (ARL) operations.
Possible value for <val> are:
1 - Use interrupts for ARL insert/delete operations
0 - Use polling mode for all operations
Example: schan_intr_enable=0
|
| schan_timeout_usec | S-Channel operation timeout in microseconds. Note that ARL insert/delete messages can take a while if the ARL is highly active.
|
| serdes_automedium=<val> | Configure signal auto-detection between SGMII and fiber. This only works when auto-negotiation is enabled.
Example: serdes_automedium=0
|
| serdes_driver_current_lane<lnum>_<port>=<val> | Serdes core driver current. Valid range: 8 bit.
Example: To set the driver current for port 1, lane 3 to a value of 0x6, use "serdes_driver_current_lane3_1=0x6"
|
| serdes_fiber_pref | This manually selects either fiber or SGMII when auto-detection is off
|
| serdes_firmware_mode=<val> | To set Serdes micro controller firmware mode.
Example: serdes_firmware_mode=2
|
| serdes_if_type=<val> | To manually select the port interface type like SFI, XFI, GMII, SGMII, XAUI, XLAUI.
Use the values defined in _shr_port_if_t for <val>.
Example: serdes_if_type=10 for XFI interface type.
|
| serdes_pre_driver_current_lane<lnum>_<port>=<val> | Serdes core pre-driver current. Valid range: 8 bit.
Example: To set the pre-driver current for port 1, lane 0 to a value of 0x4, use "serdes_pre_driver_current_lane0_1=0x4"
|
| serdes_preemphasis_lane<lnum>_<port>=<val> | Serdes core preemphasis. Valid range: 16 bit.
Example: To set the pre-emphasis setting for port 1, lane 2 to a value of 0xc6e0, use "serdes_preemphasis_lane2_1=0xc6e0"
|
| serdes_rx_los_<port>=<val> | To control serdes Loss Of Signal(LOS) function. Possible values for <val> are: 0-disable, 1-enable.
Example: To enable serdes LOS on port 29, use "serdes_rx_los_29=1"
|
| serdes_sgmii_master | Switch serdes SGMII master/slave mode configuration. Default is slave.
|
| skip_L2_USER_ENTRY=<val> | To control sending of some reserved multicast MAC addresses to the CPU as PDU's.
Possible value for <val> are:
1 - To enable L2 caching of BPDU MAC addresses.
0 - To disable L2 caching of BPDU MAC addresses.
Example: skip_L2_USER_ENTRY=0
|
| split_horizon_forwarding_groups_mode | See SDK documentation.
|
| sram_scan_enable | Control to automatically run background sram scan to detect and correct parity or ECC errors in certain static hardware memories (SRAM memories)
|
| stable_filename=<filename> | Specify the stable file to which the stable cache data (warmboot data) is written during warmboot operations. To use this propery, "stable_location" has to be set to 2.
Example: To use "/tmp/scache_file" for scache data, use "stable_filename=/tmp/scache_file"
|
| stable_location=<val> | Specify the stable cache option for Warm Boot operations. Please choose a value of 3 in order to use "stable_filename" property.
Example: stable_location=3
|
| stable_size=<val> | Specify the stable cache size in bytes used for Warm boot operations. It depends on the features provided by the underlying silicon. Please choose the stable cache size appropriately.
Example: Stable cache size of atleast 85MB is recommended for platforms with Tomahawk silicon, which can be set by using "stable_size=89128960".
|
| stat_if_parity_enable | If TRUE, parity checking is enabled. Reports with parity-errors are discarded. The parity indications are on expense of some other fields, as described in the statistics report format documentation.
|
| switch_bypass_mode | On BCM5682x, BCM5672x and BCM56960 devices, some of the switching logic may be skipped to decrease traffic latency. On BCM5682x and BCM5672x, the three modes available are: 0 - normal operation 1 - Skip L3 Switch logic 2 - Skip L3 and FP Switch logic On BCM56960, the Switch latency bypass modes availabe are: 0 - normal operation 1 - balanced latency L2 + L3 2 - low latency L2
|
| table_dma_enable | Enable/Disable TABLE DMA.
|
| tdma_intr_enable=<val> | This variable controls the interrupt mode for Table DMA operations.
Possible value for <val> are:
1 - Use interrupts for Table DMA operations
0 - Use polling mode for Table DMA operations
Example: tdma_intr_enable=0
|
| tdma_timeout_usec=<val> | Table DMA operation timeout in microseconds.
Example: tdma_timeout_usec=3000000
|
| trunk_extend=<val> | To extend maximum number of front panel trunk groups from 32 to 128.
Example: trunk_extend=1
|
| tslam_dma_enable | Enable/Disable SLAM DMA
|
| tslam_intr_enable=<val> | This variable controls the interrupt mode for Table SLAM DMA operations.
Possible value for <val> are:
1 - Use interrupts for Table SLAM DMA operations
0 - Use polling mode for Table SLAM DMA operations
|
| tslam_timeout_usec=<val> | Table SLAM DMA operation timeout in microseconds.
Example: tslam_timeout_usec=3000000
|
| xgxs_lcpll_xtal_refclk=<val> | To use crystal input for LCPLL.
Example: xgxs_lcpll_xtal_refclk=1
|
| xgxs_pdetect_10g | Unicore 10G parallel detect (10/12 Gbps legacy speed detection)
|
| xgxs_rx_lane_map_<port>=<val> | Remap XGXS RX lanes to desired mapping. Four bits were used for specifying each lane in the format of Lane 0 (bit 15-12), Lane 1 (bit 11-8), lane 2 (bit 7-4), and lane 3 (bit 3-0). For example, to reverse the rx lane mapping in 3, 2, 1, 0 order, set xgxs_rx_lane_map=0x3210. However for Warpcore serdes device, the format is in reversed order, that is, Lane 3 (bit 15-12), Lane 2 (bit 11-8),lane 1 (bit 7-4), and lane 0 (bit 3-0). The example above will be: xgxs_rx_lane_map=0x0123.
Example: To set RX lane map for port 1 to a value of 0x213, use "xgxs_rx_lane_map_1=0x213"
|
| xgxs_tx_lane_map_<port>=<val> | Remap XGXS TX lanes to desired mapping. See xgxs_rx_lane_map for values.
Example: To set TX lane map for port 29 to a value of 0x3021, use "xgxs_tx_lane_map_29=0x3021"
|
Please refer to Hardware specification for more details on the parameters required for platform customization.
#The following sample configuration is used to configure the first two ports in 40g mode.
portmap_1=29:40
portmap_2=25:40
#The following sample configuration is used to configure the same set of ports in 10g mode, with each 40g converting into four 10g ports.
portmap_1=29:10
portmap_2=30:10
portmap_3=31:10
portmap_4=32:10
portmap_5=25:10
portmap_6=26:10
portmap_7=27:10
portmap_8=28:10
#The following sample configuration is used for warmboot operations.
stable_location=3
stable_filename=/tmp/scache_file
stable_size=89128960
#The following commands are used to program LED's on AS5712 platform.
led 0 stop
local led0_code '\
06 FE 80 D2 19 71 08 E0 60 FE E9 D2 0F 75 10 81 \
61 FD 02 3F 60 FF 28 32 0F 87 67 4A 96 FF 06 FF \
D2 2B 74 16 02 1F 60 FF 28 32 0F 87 67 4A 96 FF \
06 FF D2 13 74 28 02 0F 60 FF 28 32 0F 87 67 4A \
96 FF 06 FF D2 0B 74 3A 3A 48 32 07 32 08 C7 32 \
04 C7 97 71 57 77 69 32 00 32 01 B7 97 71 63 32 \
0E 77 6B 26 FD 97 27 77 6B 32 0F 87 57 00 00 00'
led 0 prog $led0_code
led 0 start
